1. Field of the Invention
The present invention relates to a driving device for a plasma display panel.
2. Discussion of Related Art
A plasma display device is a flat panel display device, which displays characters or images by exciting a phosphor material using plasma obtained through a gas discharge. In comparison with a liquid crystal display (LCD) or a field emission display (FED), the plasma display device has higher luminance and emission efficiency, and wider viewing angle. Accordingly, plasma display devices are in the spotlight as a substitute for cathode ray tube (CRT) devices.
Plasma display panels (PDPs) are classified into direct current (referred to as ‘DC’ hereinafter) and alternating current (referred to as ‘AC’ hereinafter) PDPs depending upon driving waveform shapes and discharge cell structures. In a DC PDP, the electrodes are exposed in a discharge space, and electrical charges directly moving between the electrodes generate a discharge. In contrast, in an AC PDP, at least one electrode is covered with a dielectric layer, and wall charges (instead of electric charges directly moving between the electrodes) generate a discharge.
Additionally, PDPs may be classified into opposing discharge and surface discharge PDPs depending on the arrangement of electrodes. In an opposing discharge PDP, an address discharge for selecting discharge cells and a sustain discharge for sustaining a discharge are generated between a scan electrode (anode) and an address electrode (cathode). In a surface discharge PDP, an address discharge for selecting discharge cells is generated between an address electrode and a scan electrode crossing each other, and a sustain discharge for sustaining a discharge is generated between the scan electrode and a sustain electrode.
Referring now to FIG. 1, in a PDP such as those described above, a unit frame is divided into a plurality of sub fields, and the plasma display device is driven time divisionally to display a multiple gray scale image. Each of sub fields SF1˜SF6 includes an initialization (or reset) period for making a charge state of a discharge cell uniform, a respective one of address periods A1˜A6 for forming a wall charge on a discharge cell to be driven, and a respective one of sustain discharge periods S1˜S6 for sustaining a discharge for display of an image. For the driving operation, a voltage signal having a waveform (e.g., a predetermined waveform) is applied to respective electrodes.
FIG. 1 shows a unit frame divided into 6 sub fields SF1˜SF6. However, the greater the number of the sub fields, the better the quality of a displayed image. Accordingly, a unit frame divided into 10 to 12 or more sub fields has been studied. Namely, when the number of the sub fields is increased, pseudo profile noise, which is a main factor affecting image quality, is reduced, thereby enhancing the image quality.
Further, as an example of another factor of improving image quality, there is an operation margin security of a plasma display panel. This will be described in more detail with regards to a ramp reset method. According to the method, in a ramp reset being performed during an initialization period PR, after positive wall charges have been formed, wall charges are erased except for suitable wall charges that allow for a low voltage address operation to be performed. As shown in FIG. 2, the method uses a voltage signal including a ramp up signal (or rising ramp signal) A and a ramp down signal (or falling ramp signal) B.
FIG. 3 is a circuit diagram of a driving device for a conventional plasma display panel as an example of a circuit for generating ramp signals as shown in FIG. 2. That is, FIG. 3 shows a portion of a drive circuit using a capacitive load to operate a switch serving as a constant current source.
Suppose, for example, that a voltage applied to a plasma display panel is Vc. Since a voltage of a rising ramp signal and that of a falling ramp signal are linearly increased and decreased, respectively, with respect to a time axis, a time derivative of the voltage Vc is a constant K, as expressed by the following equation.
                                          V            c                    =                                    1              C                        ⁢                          ∫                              i                ⁢                                  ⅆ                  t                                                                    ⁢                                  ⁢                                            ⅆ                              V                c                                                    ⅆ              t                                =                                                    1                C                            ×              i                        =            K                                              (        1        )            
In equation (1), C has a constant value as a capacitance of the display panel. Accordingly, in order to output a ramp signal as shown in FIG. 2, an electrical current i introduced to the display panel should be constant.
With reference to FIG. 3, a resistor R1 is connected between a control signal input terminal S1 and a gate of the transistor Q1. A capacitor C1 is connected between a gate and a drain of the transistor Q1. The capacitor Cgd shown in FIG. 3 is a parasitic capacitance between the gate and the drain of the transistor Q1, and the capacitor Cgs is a parasitic capacitance between the gate and the source of the transistor Q1.
To completely turn on the transistor Q1, the capacitor Cgs between the gate and the source should be charged, and the capacitor Cgd between the gate and the drain should be charged. Here, because the capacitor Cgs is charged by a charge of the capacitor Cgd, the capacitor C1 is added. Accordingly, an interval from a time in which a voltage exceeding a threshold voltage of the transistor Q1 is supplied between the gate and the source thereof to a time in which the transistor Q1 is completely turned on, can be extended to some degree. Accordingly, when the capacitor Cgs is charged through a path {circle around (1)} and the transistor Q1 is turned on a little, a gate current is introduced to the display panel through a path {circle around (2)}. Further, when the capacitor Cgs starts to be discharged to turn off the transistor Q1, the transistor Q1 functions as a constant current source by a negative feed back through the paths {circle around (1)} and {circle around (2)}.
However, as described earlier, the conventional driving device for generating the ramp signals has components (e.g., capacitors and transistors) having performance characteristics that are highly temperature dependent. Accordingly, when the operating temperature changes, a slope of a ramp signal also changes, as shown in FIG. 4. Namely, in the plasma display panel, as an operation time progresses, the operating temperature is increased. When the temperature is increased, an insulative property of a dielectric material is degraded such that a leakage of wall charges occurs, or a movement of the wall charges is increased in a discharge space to easily cause recombinations, thereby causing the leakage of the wall charges. Accordingly, when a voltage signal lower than a level required in a high operating temperature is applied, discharge errors such as an incorrect discharge in which a selected pixel is not operated, may occur.